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Experimental investigation of semiconductor losses in cryogenic DC-DC converters

Jia, Chunjiang (2008)
Ph.D. thesis, University of Birmingham.

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As high-temperature superconductor technology approaches commercial applications, for example superconducting magnetic energy storage, superconducting fault current limiters, and superconducting rotary machines for marine propulsion, it is timely to consider the possibility of integrating the associated control equipment into the cryostat with the superconductor. This may bring benefits in terms of the performance of the power electronics or may enable other system benefits such as higher voltage lower current feedthroughs which reduce heat leakage into the cryostat. This Thesis studies the performance of several DC-DC power conversion techniques at temperatures down to 20 K. In particular hard switching, synchronous rectifier, zero-voltageswitching and multi-level circuit prototypes are examined, focusing on the losses in the semiconductor devices. The prototypes operated from 120 V and 500 V DC supplies at power levels up to 500 W using MOSFET devices and ultrafast, Schottky and silicon carbide diodes. The semiconductors were all in commercial TO220 packages. Although MOSFET on-state resistance was found to drop by a factor of approximately six at cryogenic temperatures, the device switching speed and switching losses were relatively insensitive to temperature. The diode on-state voltage increased by 20-30 % at low temperatures whilst reverse recovery and the associated losses decreased by a factor of up to ten. The total semiconductor losses in all prototypes reduced at low temperatures, typically exhibiting a minimum value in the region of 50-100 K. The performance of the hard switching and synchronous rectifier circuits was limited at cryogenic temperatures by switching losses, even though the dead time in the synchronous rectifier was adjusted to compensate for the increase in MOSFET gate threshold voltage at low temperatures. The zero-voltage-switching prototype offered the largest reduction in semiconductor losses at low temperatures, the losses were reduced to 18 % of the room temperature value. Furthermore, since the remaining losses were almost entirely due to MOSFET conduction, further reductions could be easily achieved by paralleling additional devices. The performance of the multi-level circuits was limited by switching losses and the large number of series connected devices; however, a zero-voltage-switching synchronous rectifier variant of the circuit was suggested to overcome some of these limitations.

Type of Work:Ph.D. thesis.
Supervisor(s):Forsyth, Andrew J.
School/Faculty:Schools (1998 to 2008) > School of Engineering
Department:Electronic, Electrical and Computer Engineering
Keywords:Cryogenic power electronics
Subjects:TK Electrical engineering. Electronics Nuclear engineering
Institution:University of Birmingham
Library Catalogue:Check for printed version of this thesis
ID Code:161
This unpublished thesis/dissertation is copyright of the author and/or third parties. The intellectual property rights of the author or third parties in respect of this work are as defined by The Copyright Designs and Patents Act 1988 or as modified by any successor legislation. Any use made of information contained in this thesis/dissertation must be in accordance with that legislation and must be properly acknowledged. Further distribution or reproduction in any format is prohibited without the permission of the copyright holder.
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